The OIF has led the industry for the past 20 years in the development and publication of next generation electrical definitions for transmitters, receivers and channels to enable interoperable electrical links for chip to chip, chip to optical, line card to line card and equipment to equipment applications. The next data rate that the industry has indicated a desire to implement is 100 Gbps over a single differential pair to enable more efficient, cost effective and faster equipment, systems and networks. The forecasted growth in networked and archived data requires that this next generation data rate become available in the very near future. The OIF is currently in the process of developing electrical link definitions for the next generation 112 Gbps data rate to provide signalling over a multitude of link types including die to die, chip to chip, chip to module, medium reach chip to chip and long reach chip to chip also known as backplane. These developing documents will be freely shared across the industry as they are completed.
To support next generation rates, it may become necessary for equipment designs and architectures to transistion from current materials and structures due to insertion losses as well as take advantage of newer and alternate materials and equipment designs. The electrical properties of these materials and structures are being considered as the CEI-112G documents are being drafted.
In addition to the development of the Implementation Agreement documents that define these interoperable systems, the OIF is also currently engaged in interoperability testing that helps to ensure that as the documents mature, the work is validated.
Common Electrical I/O – 112G-XSR
This project will develop IA specifications for die-to-die (D2D) and die-to-OE (D2OE) electrical I/O interfaces which can be used to support Nx112G I/O links with significantly reduced power, complexity, and enhanced throughput density.
Common Electrical I/O – 112G-Very Short Reach This project will develop IA specifications for chip-to-module (c2m) interface which can be used to support optical modules (e.g., 112G, 224G and 448G) with reduced power, complexity and enhanced density.
Common Electrical I/O – 112G in MCM This project will develop and produce an implementation agreement for a low power, ultra short reach (<= 10mm) electrical die-to-die interface @ 75-116 Gbps per pair of wires across a Multi-Chip Module (MCM) substrate, targeting wide-bus high bandwidth applications.
Common Electrical I/O – 112G-LR
This project will develop and produce an implementation agreement for a Long Reach electrical backplane interface operating @ 75-116Gbps signaling over up to 1000 mm of twinax cable with two connectors, or over a shorter length of PCB backplane trace.
Common Electrical I/O – 112G-MR
This project will develop and produce an implementation agreement for a Mediium Reach electrical interface operating @ 75-116Gbps signaling over up to 500 mm of PCB with one connectors.
2019 PLL Interoperability Demo at OFC – More details coming soon!