OIF has led the industry for the past 20 years in the development and publication of next generation electrical definitions for transmitters, receivers and channels to enable interoperable electrical links for chip to chip, chip to optical, line card to line card and equipment to equipment applications.

The next data rate that the industry has indicated a desire to implement is 100 Gbps over a single differential pair to enable more efficient, cost effective and faster equipment, systems and networks. The forecasted growth in networked and archived data requires that this next generation data rate become available in the very near future. OIF is currently in the process of developing electrical link definitions for the next generation 112 Gbps data rate to provide signalling over a multitude of link types including die to die, chip to chip, chip to module, medium reach chip to chip and long reach chip to chip also known as backplane. These developing documents will be freely shared across the industry as they are completed.

To support next generation rates, it may become necessary for equipment designs and architectures to transition from current materials and structures due to insertion losses as well as take advantage of newer and alternate materials and equipment designs.  The electrical properties of these materials and structures are being considered as the CEI-112G documents are being drafted.

In addition to the development of the Implementation Agreement (IA) documents that define these interoperable systems, OIF is also currently engaged in interoperability testing that helps to ensure that as the documents mature, the work is validated.

Click here for CEI-224G project information.

NEW PROJECT – Common Electrical I/O – 112G-Extra Short Reach (XSR)+
This project will allow lower power, multi-source 112Gbps (optimized for 106.25Gbps) electrical I/O interface to be developed with advanced PCB and substrate technology. The project will also support an open ecosystem based on Near Package Optics (NPO) architecture. OIF members are proposing that an “XSR+” type interface is used to add reach for NPO applications over the existing XSR interface to enable a multi-vendor open ecosystem without adding significant power.

Common Electrical I/O – 112G-Linear Project
A linear Chip-to-Optical Engine interface is needed to enable low power, low cost, small form factor 112G serial optical modules in Co-Packaged Optics, Near Package Optics (NPO) and server/GPU applications. This new project will facilitate increased bandwidth and reduced power of switch ports using co-packaged and closely packaged optical modules.

Common Electrical I/O – 112G-XSR
This project will develop IA specifications for die-to-die (D2D) and die-to-OE (D2OE) electrical I/O interfaces which can be used to support Nx112G I/O links with significantly reduced power, complexity, and enhanced throughput density.

Common Electrical I/O – 112G-Very Short Reach
This project will develop IA specifications for chip-to-module (c2m) interface which can be used to support optical modules (e.g., 112G, 224G and 448G) with reduced power, complexity and enhanced density.

Common Electrical I/O – 112G in MCM
This project will develop and produce an implementation agreement for a low power, ultra short reach (<= 10mm) electrical die-to-die interface @ 75-116 Gbps per pair of wires across a Multi-Chip Module (MCM) substrate, targeting wide-bus high bandwidth applications.

Common Electrical I/O – 112G-LR
This project will develop and produce an implementation agreement for a Long Reach electrical backplane interface operating @ 75-116Gbps signaling over up to 1000 mm of twinax cable with two connectors, or over a shorter length of PCB backplane trace.

Common Electrical I/O – 112G-MR
This project will develop and produce an implementation agreement for a Medium Reach electrical interface operating @ 75-116Gbps signaling over up to 500 mm of PCB with one connectors.

Demos

Press Releases

Speaking

  • DesignCon 2021 OIF Panel:“Interoperable Common Electrical I/O and Channel Standards – An OIF Perspective”
    Tuesday, August 17, 2021 – 4:00-5:15 PDT
    Moderator: Nathan Tracy, OIF VP of Marketing, TE Connectivity
    Panelists: Pirooz Tooyserkani, Cisco (presenting for Gary Nicholl); Mike Li, OIF Board Member, Intel; Cathy Liu, Broadcom Inc.; Keysight Technologies (presented by Mike Li)
  • OFC 2021 OIF Panel: “Electrical Data Rates Keep Pushing Forward; An OIF Update”
    Tuesday, June 08, 2021 – 11:00-12:00 PDT
    Moderator: Nathan Tracy, OIF VP of Marketing, TE Connectivity
    Panelists: David Stauffer, OIF Physical & Link Layer Working Group Chair, Kandou Bus SA; Gary Nicholl, OIF Secretary/Treasurer, Cisco; Cathy Liu, Broadcom Inc.; Mike Li, OIF Board Member, Intel and Thananya Baldwin, Keysight Technologies
  • DesignCon 2019 OIF Panel: “112Gbps Electrical Interfaces – An OIF update on CEI-112G”
    Track: 08. Optimizing High-Speed Serial Design
    Moderator: Nathan Tracy, OIF VP of Marketing, TE Connectivity
    Panelists: Brian Holden, Kandou Bus; Cathy Liu, OIF Board Member, Broadcom Limited; Steve Sekel, OIF PLL Interoperability WG Chair, Keysight
  • NGON & DCI Europe 2018
  • DesignCon 2018

Success Story

Fact Sheet

For more information, contact Dave Stauffer, Physical and Link Layer Working Group Chair at technicalquestions@oiforum.com.

For information on other OIF current projects, please see OIF Current Work

For public OIF Implementation Agreements, please see Implementation Agreements (IAs)